Samsung Electronics is intensifying its research and development (R&D) efforts on NAND flash memory, focusing on the next-generation memory semiconductor material known as ‘hafnia ferroelectrics.’ The goal is to significantly boost the capacity of memory semiconductors by elevating 3D NAND from the current 200 to 300 layers to an impressive 1,000 layers.
At the upcoming 2024 IEEE Symposium on VLSI Technology & Circuits in Hawaii, USA, Samsung Electronics plans to showcase its R&D accomplishments, achieved in collaboration with the Korea Advanced Institute of Science & Technology (KAIST).
Industry sources reveal that Samsung Electronics is concentrating its R&D capabilities on hafnia ferroelectrics-based 3D NAND technology, partnering with major domestic and international research institutions, including KAIST. Hafnia ferroelectrics, a material expected to replace the oxide-based thin film used in conventional 3D NAND stacking technology, promises enhanced durability and stability.
The transition from 2D NAND to 3D NAND was driven by the limitations of the former, which could not progress technologically beyond the 10nm range. Samsung Electronics pioneered commercialized 3D NAND technology in 2013. While 2D NAND can be likened to standalone houses, 3D NAND, which stacks cells vertically, resembles apartment buildings. It offers faster speeds, increased capacity, and lower power consumption compared to 2D NAND.
Nevertheless, 3D NAND technology faces formidable challenges, particularly in the manufacturing process. Creating the film stack necessitates depositing multiple thin layers with precision, as any defect or variation in thickness can significantly impact device performance. As the number of layers increases, challenges in etching technology also escalate, with maintaining uniform hole diameter throughout the layers proving extremely difficult.
Hafnia ferroelectrics emerge as a solution to these challenges, offering thinner and stronger films compared to oxide-based materials. This enables the implementation of much thinner films, surpassing the 10nm scale and facilitating easier etching processes. Additionally, the material’s lower voltage requirement for data recording and reduced power leakage enhance chip performance.
A Samsung Electronics official said, “Our aim is to develop 1,000-layer NAND within a few years, focusing our R&D efforts on boosting the performance and capacity of solid-state drives (SSDs) based on NAND to the petabyte (PB) level.”
Currently, SSD products on the market offer a maximum capacity of around 32 terabytes (TB), predominantly utilizing 250-layer NAND technology. Samsung Electronics is poised to unveil the ongoing R&D process of the 400-layer NAND products at the VLSI Symposium, shedding light on its medium- to long-term memory development roadmap, which includes high-capacity and high-performance SSDs based on these advancements.
