Intel's backside power solution PowerVia. / Intel

Samsung Electronics, Intel, and TSMC are gearing up to implement backside power delivery to their 2-nanometer nodes in a bid to strengthen their competitiveness in the AI chip market. Backside power delivery is set to become a game-changer that offers chipmakers a competitive edge in the 2nm chip market, which is expected to gain traction next year.

The Institute of Electrical and Electronics Engineers, or IEEE, recently said backside power delivery technology will become essential for 2nm process nodes as the technology increases the power efficiency of chips, according to industry insiders on July 3. The commercialization race is expected to heat up with Intel unveiling its first 2nm chips later this year, followed by Samsung Electronics and TSMC’s 2nm chips on track for mass production in 2025.

Backside power delivery is an advanced semiconductor technology that improves power efficiency by relocating the power delivery network from the frontside to the backside of silicon wafers. It has yet to be commercialized. Currently, all chips have power delivered from the front side of the chip, which requires power to traverse ten or more layers of wiring down to the transistor.

But as circuits become smaller and denser, it has become difficult to fit both circuits and power lines on one side. The narrowing of circuit spacing has led to interference, adding to manufacturing and design challenges.

Backside power delivery addresses these issues by routing power supply lines on the backside of the wafer. This method separates power and signal interconnects, maximizing power efficiency, reducing signal interference and improving performance. Additionally, it contributes to reducing the size of chips, which is particularly advantageous for mobile application processors (APs).

Intel is expected to be the first chipmaker to commercialize backside power delivery with its PowerVia solution. PowerVia will be applied to the Intel 20A node, which enters production later this year. Intel’s upcoming desktop CPU, Arrow Lake, which will be released in the fourth quarter of this year, will also use Intel 20A.

Samsung Electronics and TSMC are also in a race to introduce the technology next year. Samsung has moved up its commercialization timeline to 2025, initially planned for 2027. While some reports suggest that Samsung Electronics would introduce backside power delivery from the 1.7nm process, the chipmaker is now expected to revise its roadmap and implement the technology starting next year with the mass production of 2nm chips. In February, Samsung Electronics reportedly used two different ARM microprocessor cores to develop backside power delivery, reducing chip sizes by 10% and 19%, respectively, and improving chip performance and frequency efficiency by single digits.