Chinese chipmakers ChangXin Memory Technologies (CXMT) and Yangtze Memory Technologies (YMTC) are closing in on South Korea’s Samsung Electronics, the world’s biggest maker of memory semiconductors. The technology gap between Samsung and Chinese rivals is narrowing at an alarming rate, raising concerns about whether Samsung will be able to maintain its market dominance.
CXMT and other Chinese rivals have made significant inroads into the general-purpose DRAM market by increasing production volumes, and YMTC is now challenging Samsung’s once-dominant NAND flash memory technology. Some experts are worried that Samsung’s next-generation memory development has stalled and are calling for a strategic overhaul that includes changes in research and development (R&D) and product planning.
Samsung’s device solutions division, which oversees semiconductors, is struggling to develop next-generation memory products and advanced process technologies, according to sources familiar with the matter on Feb. 27. The company is reportedly set to use a hybrid bonding patent from YMTC for its upcoming 400-layer V10 NAND. Hybrid bonding is a technology that bonds wafers together without using bumps, which traditionally serve as intermediaries between layers.
In the high-end DRAM segment, Samsung is redesigning its sixth-generation 10nm-class (1c) DRAM, while the development of the next-generation seventh-generation (1d) DRAM is reportedly facing challenges.
Samsung’s decision to use YMTC’s hybrid bonding patent has raised concerns that YMTC has gained a technological edge over Samsung in next-generation semiconductor manufacturing technology. Until recently, YMTC was a minor player in the NAND flash market, while Samsung dominated with a 35.2% share as of the third quarter of last year, followed by SK Hynix at 20.6%. YMTC’s share remained below 5%.
But YMTC’s hybrid bonding technology has shifted the market dynamic. While Samsung and SK Hynix focused on refining conventional stacking methods, YMTC prioritized the commercialization of hybrid bonding for 3D NAND, branded as “Xtacking.”
The technology has emerged as a key process innovation as conventional stacking methods face limitations, with NAND layer counts now exceeding 400 layers. Samsung Electronics and SK Hynix are mass-producing NAND with 286 and 321 layers, respectively.
“Samsung and SK Hynix have focused on improving NAND stacking techniques using through-silicon vias (TSVs),” said Park Jae-geun, a professor at Hanyang University. “YMTC, on the other hand, has spent the past four to five years developing hybrid bonding technology, effectively taking the lead in next-generation NAND process technology.”
A senior Samsung official acknowledged the growing pressure: “With competitors catching up in next-generation product development and manufacturing processes, re-evaluating our strategy from R&D to future product planning is inevitable.”
Adding to Samsung’s woes, the chipmaker’s competitiveness in advanced DRAM technology, a key pillar of its semiconductor business, is also facing setbacks. The company recently decided to redesign its most advanced DRAM chip, the 1c DRAM. Each new generation of 10nm-class DRAM involves shrinking circuit sizes to enhance performance and power efficiency. Currently, Samsung, SK Hynix, and Micron are competing in the market with 1a and 1b DRAM products while also racing to develop 1c DRAM.
Samsung’s decision to redesign 1c DRAM suggests the company may struggle to secure an early lead in the high-end DRAM segment. A complete redesign requires extensive work, including reconfiguring circuit layouts and adjusting components such as masks for mass production. Meanwhile, Micron, the world’s third-largest memory semiconductor company, announced on Feb. 25 that it has begun shipping 1c DRAM samples to customers.
